Tilera announces 64-core processor

[baligavinod]

TG Daily

Silicon Valley startup Tilera today announced the Tile64, a processor with 64 programmable cores that, according to the company, houses ten times the performance and 30 times the power efficiency of Intel's dual-core Xeon processors.

[verndewd]

 

TILE64™ PROCESSOR FAMILY

The TILE64™ family of multicore processors delivers immense compute performance to drive the latest generation of embedded applications. This revolutionary processor features 64 identical processor cores (tiles) interconnected with Tilera's iMesh™ on-chip network. Each tile is a complete full-featured processor, including integrated L1 & L2 cache and a non-blocking switch that connects the tile into the mesh. This means that each tile can independently run a full operating system, or multiple tiles taken together can run a multi-processing operating system like SMP Linux.

The TILE64™ processor family slashes board real estate and system cost by integrating a complete set of memory and I/O controllers, thus eliminating the need for an external North Bridge or South Bridge. It delivers scalable performance, power efficiency and low processing latency in an extremely compact footprint.

With a standard ANSI C programming environment, developers can leverage their existing software investment as well as utilize the vast body of Open Source code available. Tiles can be grouped into clusters to apply the appropriate amount of horsepower to each application. Since multiple operating system instances can be run on the TILE64™ simultaneously, it can replace multiple CPU subsystems for both the data plane and control plane.

Applications

Advanced Networking: The TILE64 processor provides the Ethernet line interfaces as well as the entire data plane processing for intelligent network services such as:

• Unified Threat Management (UTM)
  
• Network Security Appliances
  
• In-line L4-7 deep packet inspection
  
• Network Monitoring

Digital Video: The TILE64 processor also excels at digital video processing, easily taking the place of multiple DSPs as well as the networking components for:

• Video Conferencing
  
• Video-on-Demand (VoD) Servers
  
• Video surveillance
  
• Media 'Head-End' services

Feature
Enables

Massively Scalable Performance
• 8 X 8 grid of identical, general purpose processor cores (tiles)
• 3-way VLIW pipeline for instruction level parallelism
• 5 Mbytes of on-chip Cache
• 192 billion operations per second (32-bit)
• 27 Tbps of on-chip mesh interconnect
• Up to 50 Gbps of I/O bandwidth
• 10 Gbps Snort® processing
• 20+ Gbps iptables (firewall)
• 20+ Gbps nProbe
• 16 X 16 SAD at 540 MBlocks/s
• H.264 HD video encode for two streams of 720p @ 30 Fps

Power Efficiency
• 600MHz – 900MHz operating frequency
• 170 – 300mW per core
• Idle Tiles can be put into low-power sleep mode
• Power efficient inter tile communications
• Highest performance per watt
• Simple thermal management & power supply design
• Small System form factor
• Low BOM cost

Integrated Solution
• Four DDR2 memory controllers with optional ECC
• Two 10GbE XAUI MAC/PHY interfaces
• Two 4-lane 10Gbps PCI-e MAC/PHY interfaces
• Two GbE MAC interfaces
• Flexible I/O interface
• Reduces BOM cost – standard interfaces included on-chip
• Dramatically reduced board real estate
• Direct interface to leading L2-L3 switch vendors

Ease of Programming
• ANSI standard C compiler
• Supports SMP Linux with 2.6 kernel
• iLib API's for efficient inter-tile communication
• Advanced profiling and debugging designed for multicore programming
• Run off-the-shelf C programs
• Leverage investment in existing code
• Reduce debug and optimization time
• Faster time to production code
• Standard multicore communication mechanisms

TILE64™ Processor Block Diagram

Tilera

[verndewd]

 

TILExpress-64™ CARD

The TILExpress family of PCIe cards delivers the industry's highest performance processing for demanding applications in networking and digital multimedia. The board features Tilera's powerful TILE64™ processor together with a rich set of network interfaces, speeding time-to-market for embedded appliances.

The 64-core TILE64™ processor's versatility allows it to perform a variety of compute-intensive tasks such as:

• Network flow classification
  
• Deep packet inspection
  
• Quality of Service (QoS) provisioning
  
• Video encoding / transcoding
  
• Video analytics

An advanced networking front-end incorporates a powerful L2-L3 intelligent Ethernet switch to provide 6 or 12 ports of gigabit Ethernet I/O as well as a 10 gigabit Ethernet XAUI port. An optional mezzanine expansion card further increases flexibility, supporting specialized co-processors, additional I/O or even enabling an additional TILE64™ processor to be added.

TILExpress Card Block Diagram

Tilera Corporation

[SEAL]

Me wanty.

[verndewd]

Why do you have a demanding network? This chip is just an advanced nic so to speak.

[SEAL]

Yeah, I know... but it would be so cool to tell people that I have a 64-core CPU in my PC.

[verndewd]

epeen.

[beerandcandy]

so the title should be 64 core nic?
the network is controled by a protocol not a processor
nothing to see here move along!

[verndewd]

 

The Multicore Development Environment™ (MDE)

Published Mon, 2007-08-20 17:46 CPU

The TILE64™ processor is supported by the most robust set of software tools ever designed for multicore processor technology. The toolset is based on an industry-proven, open programming environment and adds advanced multicore debugging and profiling techniques to accelerate developer productivity and time to market.

The Tilera MDE includes a powerful Eclipse-based Integrated Development Environment (IDE), an ANSI standard C compiler, a full-system simulation model and a set of flexible command-line interfaces. The MDE also provides innovative, graphically-driven tools for debugging and profiling multicore processors, and an application level library that provides lightweight socket-like stream communication mechanisms. The TILE64 processor supports this immense body of open source tools and applications with the standard SMP Linux programming environment.

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Processor Specifications, TILE64™

Published Mon, 2007-08-20 17:37 CPU

Each of the 64 cores on the TILE64™ processor is capable of running its own operating system, such as Linux, and provides dramatically more compute performance than any other competing multicore device. Each core is a full-featured, general-purpose processor that includes L1 and L2 caches, as well as an innovative distributed L3 cache. The cores are overlaid with the iMesh network, which provides extremely low-latency, high bandwidth communications between the cores, memory and the I/O.

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The TILE64™ Processor

Published Mon, 2007-08-20 17:27 CPU

The TILE64™ processor, from Tilera Corporation, the first in a family of Tile Processor™ chips based on a revolutionary architecture that can scale to hundreds and even thousands of cores. The TILE64 processor contains 64 full-featured, programmable cores - each capable of running Linux - and delivers 10X the performance and 30X the performance-per-watt of the Intel dual-core Xeon, and 40X the performance of the leading Texas Instruments DSP*. Initial target markets for the TILE64 processor include the embedded networking and digital multimedia markets.

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CPU

[Pippero]

Not quite.
This is a real CPU, it's innovative and sounds pretty powerful for the highly parallel tasks that it's designed to execute (encoding 20Mb 1080p HDTV in real time is not bad at all..).

[randomizer]

Meh, if its got less than 4096 cores it is no better than my sandiego as far as I'm concerned.

EDIT: For gaming I mean, since its not x86